• Development of complete HW & embedded SW system for Proof of Concept
• FPGA: Arria 5, Cyclone, Igloo Nano
• MCU: Atmel AVR, TI MSP430, PIC, Freescale Kinetis, Cypress PSoC
• Python, Matlab or C/C++
• PCB design, Manufacturing and Assembly

AnSem's ASIC solutions are specified in close cooperation with its customers, tailoring the specific ASIC requirements to the customer's detailed system needs and giving the customer full control over the final product specification.

AnSem's partnerships with ASIC foundries, packaging and test suppliers allow it to balance the customer's ASIC requirements with the limitations posed by the technologies used in order to optimize cost, performance and quality for each individual application.

The ASIC definition phase includes:

• Translation of system needs into ASIC needs in collaboration with the customer
• Validation of the concept
• Feasibility study, topology selection and simulation of critical specifications
• Architecture definition of the ASIC
• Selection of semiconductor process and package
• Quality, test and manufacturability aspects
• Detailed Planning
• Risk assessment, (D)FMEA
• Development cost and production price
• Mutually agreed ASIC specification

AnSem's team of ASIC designers and its large analog IP library of proven IC designs, supplemented by the IP libraries of its design partners, form the basis for a fast and predictable ASIC development trajectory, meeting customer's critical time-to-market requirements.
The ASIC development phase includes:

• Analog and mixed signal IC design and layout
• Intensive corner simulations and verifications
• Custom layout of all analog sections
• HDL coding of all digital sections, synthesis & P&R
• Top level integration, layout and verification
• Design documentation, user manual
• DfT (Design for Test) and DfM (Design for Manufacturing)
• Tape Out procedure
• ASIC Prototype manufacturing
• Masks preparation
• Wafer processing
• Package assembly

Silicon Manufacturing

• Access to all foundries and technology nodes
• MPW (Multiple Project Wafer), MLM (Multi-Layer Masks), SLM (Single Layer Mask)
• TSMC, Global Foundries, X-FAB, On Semiconductor, TowerJazz, AMS, …

Assembly

• QFN, BGA,…
• WL-CSP, Flip Chip
• Bare dies: tested wafers, blue foil, waffle pack,…
• Local prototyping for fast turnaround
• High volume in Far East

Prototype characterization

• Development of a detailed evaluation plan
• Design and manufacturing of dedicated test hardware and software
• Prototype evaluation and characterization over voltage and temperature ranges
• ATE test correlation
• Fully equipped measurement lab

AnSem takes responsibility for the industrialization process, whereby the prototype design is made ready for large volume manufacturing, optimizing the design for test (DfT) and manufacturability (DfM), executing the different qualification tests and developing the industrial wafer and final test programs on the selected ATE machine.

The industrialization phase includes:

• ATE program development & optimization
• Executed on dedicated lab equipment and/or production ATE testers: Credence D10, Teradyne FLEX, Teradyne UltraFLEX
• Reliability ESD, Latch Up test and HTOL tests
• Specific product qualification
• PPAP (Production part approval Process)
• Manufacturability assessment & release for volume production
• Safe Launch
• Transfer to volume production

AnSem provides full supply chain management, from taking in orders from customers, over managing manufacturing subcontractors and continuous monitoring of product quality, to management of inventory and transportation of final goods to customer's global warehouses.

The supply chain management phase includes:

• Customer order management
• Management of subcontractors (Foundry, Packaging & test)
• Quality management: production cpk monitoring
• Test cost optimization
• Yield management: cost optimization
• Customer Return and Failure Analysis (FA)
• Management of obsolescence, security of supply, longevity of supply, ...